ASM
Registers -> CPU's storage for executing instructions
Instruction Pointer
The Instruction Pointer (IP), contains the next address to be executed. For 64bit architecture, the IP is the RIP and for the x32 it's the EIP. For instance, with Radare2, we can check the IP register value:
[0x61edfae3715f]> dr rip
0x61edfae3715f
In the example above, we have the RIP register which contains the value of the next IP, which is the function entry0.
[0x00001060]> dr rip
0x00001060
[0x00001060]> afl entry
0x00001060 1 38 entry0
General-Purpose Registers
EAX/RAX
Accumulator Register for arithmetics operations. For instance, the ASM code below made a sum between two integers. :
0x61edfae37157 8b55fc mov edx, dword [var_4h]
0x61edfae3715a b 8b45f8 mov eax, dword [var_8h]
0x61edfae3715d b 01d0 add eax, edx
After the add operation, the value of the register EAX is the sum of var_4h and var_8h.
EBX/RBX
Base Register store the Base address for referencing an offset.